hw/arm: add Radxa ROCK 5B+ and split RK3588 board models#15
Conversation
Keep the RK3588 machine state and SoC implementation private while allowing board implementations in separate translation units to inherit the common machine. Make board-specific DRAM type, GMAC presence and PCIe lane count declarative. The existing EVB and ROC-PC values remain unchanged. Signed-off-by: Chao Liu <[email protected]>
Register ROCK 5B+ as an independent board implementation that inherits the common RK3588 machine. Describe the Radxa board as LPDDR5 with eMMC firmware boot, PCIe x2 and no SoC DWMAC instances. Add a dedicated qtest covering one-CPU and eight-CPU configurations and the board-specific memory, interrupt, storage and firmware contracts. Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Model the deferred single-descriptor SHA-256 DMA flow used by the Radxa SDK SPL to authenticate external-data FIT images. Reject unsupported restart and chained descriptor flows, and expose the polling status and digest register contract through RegisterInfo. Instantiate the device only for the ROCK 5B+ firmware profile and cover digest, write-mask, W1C, reset and invalid-flow behavior with the standalone board qtest. Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Replace the machine-local firmware MMIO callbacks and GRF state with independent SysBus devices. Extend the DDR model with the vendor firmware windows needed by the ROCK 5B+ TPL, and queue the FIT handoff on the vCPU to avoid resetting a running CPU from timer context. Signed-off-by: Chao Liu <[email protected]>
Parameterize the RK3588 PCIe FDT description and emit the second PCIe host only for ROCK 5B+. Add a qtest that validates its registers, interrupts, resets, bus range, MSI mapping, and outbound ranges. Signed-off-by: Chao Liu <[email protected]>
Provide one minimal device configuration for each concrete RK3588 machine so downstream builds can include a single board without pulling in its siblings. Add the split board and device sources to MAINTAINERS. Signed-off-by: Chao Liu <[email protected]>
List ROCK 5B+ alongside the EVB and ROC-PC machines, describe the independent peripheral boundaries, and provide verified direct-Linux and complete Radxa SDK firmware boot examples. Signed-off-by: Chao Liu <[email protected]>
The RK3588 machine uses its board-defined heterogeneous CPU topology and does not apply a global -cpu override. Remove the misleading Cortex-A76 option from both ROCK 5B+ boot examples. Signed-off-by: Chao Liu <[email protected]>
Add pinned Radxa rsdk-b2 assets and exercise both direct kernel loading and the complete DDR/TPL, SPL, verified FIT, ATF, U-Boot, extlinux, and Linux path. Require both boots to reach an interactive BusyBox shell and report the expected SDK kernel release. Signed-off-by: Chao Liu <[email protected]>
There was a problem hiding this comment.
💡 Codex Review
Here are some automated review suggestions for this pull request.
Reviewed commit: 0579bc601b
ℹ️ About Codex in GitHub
Your team has set up Codex to review pull requests in this repo. Reviews are triggered when you
- Open a pull request for review
- Mark a draft as ready
- Comment "@codex review".
If Codex has suggestions, it will comment; otherwise it will react with 👍.
Codex can also answer questions or update the PR. Try commenting "@codex address that feedback".
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Signed-off-by: Chao Liu <[email protected]>
Make the DesignWare root bus report its configured bus-nr so iATU configuration accesses can reach the root port. Keep DBI accesses working for non-zero root bus numbers and cover the ROCK 5B+ bus 0x10 path with qtest. Signed-off-by: Chao Liu <[email protected]>
|
@codex review |
|
Codex Review: Didn't find any major issues. Swish! Reviewed commit: ℹ️ About Codex in GitHubYour team has set up Codex to review pull requests in this repo. Reviews are triggered when you
If Codex has suggestions, it will comment; otherwise it will react with 👍. Codex can also answer questions or update the PR. Try commenting "@codex address that feedback". |
Summary
rock-5b-plusmachine for the Radxa ROCK 5B+hw/*subsystemsMotivation
The existing downstream RK3588 implementation combined multiple board definitions and some firmware-facing peripheral state in one machine source. That made board-specific behavior difficult to extend without coupling the EVB and ROC-PC machines together.
ROCK 5B+ also needs its own Radxa SDK contract, including LPDDR5 identification, eMMC boot policy, the board PCIe 3x2 topology, secure OTP behavior, Rockchip crypto-v2 hashing, and dynamic FIT handoff into the vendor U-Boot stack.
This series keeps shared SoC construction in the abstract RK3588 machine while giving every concrete board and every modeled peripheral a separate source boundary.
Boot coverage
The
rock-5b-plusmachine supports:Imageand initramfs.Both functional tests enter an interactive BusyBox shell and verify the SDK kernel release with
uname -r.Pinned functional assets are published at:
https://github.com/processmission/qemu/releases/tag/rock-5b-plus-rsdk-b2-qemu1
Validation
ninja -C build-armvirt qemu-system-aarch64 tests/qtest/rock5b-plus-test tests/qtest/rk3588-evb-test tests/qtest/rk3588s-roc-pc-testgit diff --check origin/devel..HEADscripts/checkpatch.pl origin/devel..HEAD: 0 errorsSigned-off-by: Chao Liu <[email protected]>trailerThis is a downstream board model and is not intended as an upstream QEMU submission.